Computer Networks · TEE · practice
Compare completion times · example 2
Switching techniques · optional practice
Optional extension · no matching calculation in the two supplied papers
Optional worked extension. This calculation format was not found in the supplied December 2025 final or February 2026 re-exam. The numbers and practice marks are authored. Study the core concept and actual-paper questions first; this is extra explanation, not a TEE prediction.
Practice question. A 8,000-bit message crosses 2 links, each 1 Mbps with 1 ms propagation delay. Compare whole-message switching, packet switching using 4 equal packets without headers, and a circuit with 5 ms setup. Ignore processing and queueing. [3 practice marks]
Answer
Given
| Given | Value |
|---|---|
| M | 8000 bits |
| h | 2 |
| k | 4 |
| R | 1,000,000 bits/s |
| τ | 0.001 s/link |
| Circuit setup | 0.005 s |
To find
Time until the final data bit reaches the destination in each method.
Formula and why
LaTeX: T_m=hM/R+h\tau
LaTeX: T_p=(h+k-1)L/R+h\tau
LaTeX: T_c=T_{\mathrm{setup}}+M/R+h\tauMessage switching repeats whole-message serialization at every hop. Packet switching pipelines equal packets. A circuit streams bits through the established equal-rate path.
Step-by-step solution
Step 1. Find packet size
L=M/k=8000/4=2000 bits.
Step 2. Whole-message completion
2×8000/1,000,000 + 2×0.001 = 0.018000 s = 18 ms.
Step 3. One packet transmission time
L/R=2000/1,000,000=0.002 s.
Step 4. Pipelined packet completion
(2+4−1)×0.002+2×0.001=0.012000 s = 12 ms.
Step 5. Circuit completion
0.005+8000/1,000,000+2×0.001=0.015000 s = 15 ms.
Final answer: Message=18 ms; packets=12 ms; circuit=15 ms.